{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T21:10:32Z","timestamp":1648847432272},"reference-count":46,"publisher":"Springer Science and Business Media LLC","issue":"1-3","license":[{"start":{"date-parts":[[2010,1,20]],"date-time":"2010-01-20T00:00:00Z","timestamp":1263945600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Real-Time Syst"],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1007\/s11241-009-9090-9","type":"journal-article","created":{"date-parts":[[2010,1,19]],"date-time":"2010-01-19T20:30:06Z","timestamp":1263933006000},"page":"72-104","source":"Crossref","is-referenced-by-count":2,"title":["Processing element allocation and dynamic scheduling codesign for multi-function SoCs"],"prefix":"10.1007","volume":"44","author":[{"given":"Ya-Shu","family":"Chen","sequence":"first","affiliation":[]},{"given":"Chi-Sheng","family":"Shih","sequence":"additional","affiliation":[]},{"given":"Tei-Wei","family":"Kuo","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2010,1,20]]},"reference":[{"key":"9090_CR1","doi-asserted-by":"crossref","unstructured":"Aldowaisan T, Allahverdi A (2003) New heuristics for no-wait flowshops to minimize makespan. Comput Oper Res 30(8)","DOI":"10.1016\/S0305-0548(02)00068-0"},{"key":"9090_CR2","doi-asserted-by":"crossref","unstructured":"Benini L, Bertozzi D, Guerri A, Milano M (2006) Allocation, scheduling and voltage scaling on energy aware MPSoCs. In: International conference on integration of AI and OR techniques in constraint programming for combinatorial optimization problems","DOI":"10.1007\/11757375_6"},{"key":"9090_CR3","doi-asserted-by":"crossref","unstructured":"Chen Y-S, Change L-P, Kuo T-W, Mok AK (2009) An anomaly prevention approach for real-time task scheduling. J Syst Softw 82(1)","DOI":"10.1016\/j.jss.2008.07.038"},{"key":"9090_CR4","unstructured":"Cho Y, Lee G, Yoo S, Choi K, Zergainoh N-E (2003) Scheduling and timing analysis of hw\/sw on-chip communication in MP SoC design. In: International conference on design, automation and test in Europe"},{"key":"9090_CR5","doi-asserted-by":"crossref","unstructured":"Cho Y, Yoo S, Choi K, Zergainoh N-E, Jerraya AA (2005) Scheduler implementation in MP SoC design. In: International conference on Asia south pacific design automation","DOI":"10.1145\/1120725.1120793"},{"key":"9090_CR6","doi-asserted-by":"crossref","unstructured":"Chou PH, Ortega RB, Borriello G (1995) The Chinook hardware\/software co-synthesis system. In: International symposium on system synthesis","DOI":"10.1145\/224486.224491"},{"key":"9090_CR7","doi-asserted-by":"crossref","unstructured":"Cloutier RJ, Thomas DE (1991) The combination of scheduling, allocation, and mapping in a single algorithm. In: International conference on design automation","DOI":"10.1145\/123186.123230"},{"key":"9090_CR8","volume-title":"Introduction to algorithms","author":"TH Cormen","year":"1979","unstructured":"Cormen TH, Leiserson CE, Rivest RL, Stein C (1979) Introduction to algorithms. MIT Press, Cambridge"},{"key":"9090_CR9","doi-asserted-by":"crossref","unstructured":"Dave BP, Lakshminarayana G, Jha NK (1997) Cosyn: Hardware-software co-synthesis of embedded systems. In: International conference on design automation","DOI":"10.1145\/266021.266341"},{"key":"9090_CR10","doi-asserted-by":"crossref","unstructured":"Dick R, Rhondes D, Wolf W (1998) TGFF: Task graphs for free. In: International workshop hardware\/software codesign","DOI":"10.1145\/278241.278309"},{"key":"9090_CR11","unstructured":"Dolby Inc. (2006) AC3 5.1 channel production guideline. Technical report, Dolby, http:\/\/www.dolby.com\/resources\/tech_library"},{"key":"9090_CR12","doi-asserted-by":"crossref","unstructured":"Dolif E, Lombardi M, Ruggiero M, Milano M, Benini L (2007) Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chip. In: International conference on embedded software","DOI":"10.1145\/1289927.1289940"},{"key":"9090_CR13","unstructured":"Eles P, Kuchcinski K, Peng Z, Doboli A, Pop P (1998) Scheduling of conditional process graphs for the synthesis of embedded systems. In: International conference on design, automation and test in Europe"},{"key":"9090_CR14","doi-asserted-by":"crossref","unstructured":"Eles P, Izosimov V, Pop P, Peng Z (2008) Synthesis of fault-tolerant embedded systems. In: International conference on design, automation, and test in Europe","DOI":"10.1109\/DATE.2008.4484825"},{"key":"9090_CR15","doi-asserted-by":"crossref","unstructured":"Ernst R, Henkel J, Bennr T (1993) Hardware-software cosynthesis for microcontrollers. IEEE Des Test Comput 10(4)","DOI":"10.1109\/54.245964"},{"key":"9090_CR16","volume-title":"Computers and intractability: a guide to the theory of NP-completeness","author":"MR Garey","year":"1979","unstructured":"Garey MR, Johnson DS (1979) Computers and intractability: a guide to the theory of NP-completeness. W H Freeman, San Francisco"},{"key":"9090_CR17","unstructured":"Goyal SK, Sriskandarajah C (1998) No-wait shop scheduling: computational complexity and approximate algorithms. Oper Res 25(4)"},{"key":"9090_CR18","doi-asserted-by":"crossref","unstructured":"Gu Z, Zhu C, Shang L, Dick RP (2008) Application-specific MPSoC reliability optimization. IEEE Trans VLSI Syst 16(5)","DOI":"10.1109\/TVLSI.2008.917574"},{"key":"9090_CR19","doi-asserted-by":"crossref","unstructured":"Gupta RK, Micheli GD (1993) Hardware-software cosynthesis for digital systems. In: International conference on design and test of computers","DOI":"10.1109\/54.232470"},{"key":"9090_CR20","doi-asserted-by":"crossref","unstructured":"Hall NG (1996) A survey of machine scheduling problems with blocking and no-wait in process. Oper Res 44(3)","DOI":"10.1287\/opre.44.3.510"},{"key":"9090_CR21","unstructured":"ITRI SoC Technical Center (2006) Parallel architecture core digital signal processor core. Technical report, Industrial Technology Research Institute, Taiwan"},{"key":"9090_CR22","doi-asserted-by":"crossref","unstructured":"Kalczynski PJ, Kamburowski J (2007) On no-wait and no-idle flow shops with makespan criterion. Eur J Oper Res 178(8)","DOI":"10.1016\/j.ejor.2006.01.036"},{"key":"9090_CR23","unstructured":"Lee C, Potkonjak M, Wolf W (1996) System-level synthesis of application-specific systems using a* search and generalized force-directed heuristics. In: International symposium on system synthesis"},{"key":"9090_CR24","unstructured":"Leung L-F, Tsui C-Y, Ki W-H (2004) Minimizing energy consumption of multiple-processors-core systems with simultaneous task allocation, scheduling and voltage assignment. In: International conference on Asia and south pacific design automation"},{"key":"9090_CR25","doi-asserted-by":"crossref","unstructured":"Liu B, Wang L, Jin Y, Huang D (2005) Designing neural networks using hybrid particle swarm optimization. Lecture notes in computer science, vol 3496","DOI":"10.1007\/11427391_62"},{"key":"9090_CR26","doi-asserted-by":"crossref","unstructured":"Liu B, Wang L, Jin Y-H (2007) An effective hybrid particle swarm optimization for no-wait flow shop scheduling. Int J Adv Manuf Technol 31(8)","DOI":"10.1007\/s00170-005-0277-5"},{"key":"9090_CR27","doi-asserted-by":"crossref","unstructured":"Maxiaguine A, Chakraborty S, KuNZLI S, Thiele L (2004) Evaluating schedulers for multimedia processing on buffer-constrained soc platforms. IEEE Des Test Comput 21(5)","DOI":"10.1109\/MDT.2004.60"},{"key":"9090_CR28","unstructured":"Mok AK (1983) Fundamental design problems of distributed systems for hard real-time environment. PhD thesis, Massachusetts Institute of Technology, Cambridge"},{"key":"9090_CR29","unstructured":"Mok AK (2000) Tracking real-time systems requirements. In: Workshop on modelling software system structures in a fastly moving scenario"},{"key":"9090_CR30","doi-asserted-by":"crossref","unstructured":"Murthy PK, Bhattacharyya SS (2001) Shard buffer implementations of signal processing systems using lifetime analysis techniques. IEEE Trans Comput-Aided Des Integr Circuits Syst 20(2)","DOI":"10.1109\/43.908427"},{"key":"9090_CR31","doi-asserted-by":"crossref","unstructured":"Oh H, Ha S (2002) Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints. In: International conference on hardware\/software codesign and system synthesis","DOI":"10.1145\/774789.774817"},{"key":"9090_CR32","doi-asserted-by":"crossref","unstructured":"Oh H, Ha S (2003) Memory-optimized software synthesis from dataflow program graphs with large data samples. EURASIP J Appl Signal Process 2003(6)","DOI":"10.1155\/S1110865703212130"},{"key":"9090_CR33","unstructured":"Prabhakaran P, Banerjee P (1996) Parallel algorithms for force directed scheduling of flattened and hierarchical signal flow graphs. In: International conference on computer design"},{"key":"9090_CR34","doi-asserted-by":"crossref","unstructured":"Richter K, Jersak M, Ernst R (2003) A formal approach to MpSoC performance verification. Computer 36(4)","DOI":"10.1109\/MC.2003.1193230"},{"key":"9090_CR35","doi-asserted-by":"crossref","unstructured":"Ruggieroy M, Guerri A, Bertozzi D, Poletti F, Milano M (2006) Communication aware allocation and scheduling framework for stream oriented multi-processor systems on chip. In: International conference on design, automation and test in Europe","DOI":"10.1109\/DATE.2006.243950"},{"key":"9090_CR36","doi-asserted-by":"crossref","unstructured":"Santambrogio MD, Rana V, Memik SO, Acar UA, Sciuto D (2007) A novel soc design methodology combining adaptive software and reconfigurable hardware. In: International conference on computer aided design","DOI":"10.1109\/ICCAD.2007.4397281"},{"key":"9090_CR37","unstructured":"Shirvaikar M, Estevez DL (2002) Digital camera design with JPEG, MPEG4, MP3 and 802.11 features. In: Workshop presentation, embedded systems conference"},{"key":"9090_CR38","unstructured":"Simmler H, Levinson L, Manner R (2002) Multitasking on FPGA coprocessors. In: International conference on field programmable logic and applications"},{"key":"9090_CR39","doi-asserted-by":"crossref","unstructured":"Stankovic JA, Spuri M, Natale MD, Buttazzo G (1994) Implications of classical scheduling results for real-time systems. IEEE Trans Comput 28(6)","DOI":"10.1109\/2.386982"},{"key":"9090_CR40","doi-asserted-by":"crossref","unstructured":"Stankovic JA, Spuri M, Di\u00a0Natale M, Buttazzo GC (1995) Implications of classical scheduling results for real-time systems. Computer 28(6)","DOI":"10.1109\/2.386982"},{"key":"9090_CR41","unstructured":"Texas Instruments Inc. (2006) OMAP platform. Technical report, Texas Instruments, http:\/\/focus.ti.com\/omap\/docs\/omaphomepage.tsp"},{"key":"9090_CR42","doi-asserted-by":"crossref","unstructured":"Thornton HW, Hunsucker JL (2004) A new heuristic for minimal makespan in flow shops with multiple processors and no intermediate storage. Eur J Oper Res 152(1)","DOI":"10.1016\/S0377-2217(02)00524-6"},{"key":"9090_CR43","unstructured":"Walder H, Platzner M (2003) Reconfigurable hardware OS prototype. Technical report, Swiss Federal Institute of Technology, http:\/\/citeseer.ist.psu.edu\/walder03reconfigurable.html"},{"key":"9090_CR44","doi-asserted-by":"crossref","unstructured":"Xie Y, Wolf W (2000) Co-synthesis with custom asics. In: International conference on Asia and south pacific design automation","DOI":"10.1145\/368434.368591"},{"key":"9090_CR45","unstructured":"Xie Y, Wolf W (2001) Allocation and scheduling of conditionals task graph in hardware software co-synthesis. In: International conference on design, automation, and test in Europe"},{"key":"9090_CR46","doi-asserted-by":"crossref","unstructured":"Zhu C, Gu Z, Dick RP, Shang L (2007) Reliable multiprocessor system-on-chip synthesis. In: International conference on hardware software codesign","DOI":"10.1145\/1289816.1289874"}],"container-title":["Real-Time Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11241-009-9090-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11241-009-9090-9\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11241-009-9090-9","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,26]],"date-time":"2020-05-26T22:13:45Z","timestamp":1590531225000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11241-009-9090-9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,1,20]]},"references-count":46,"journal-issue":{"issue":"1-3","published-print":{"date-parts":[[2010,3]]}},"alternative-id":["9090"],"URL":"http:\/\/dx.doi.org\/10.1007\/s11241-009-9090-9","relation":{},"ISSN":["0922-6443","1573-1383"],"issn-type":[{"value":"0922-6443","type":"print"},{"value":"1573-1383","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,1,20]]}}}