{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,11,16]],"date-time":"2023-11-16T17:12:40Z","timestamp":1700154760651},"reference-count":16,"publisher":"Wiley","issue":"5","license":[{"start":{"date-parts":[[2004,1,23]],"date-time":"2004-01-23T00:00:00Z","timestamp":1074816000000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Softw Pract Exp"],"published-print":{"date-parts":[[2004,4,25]]},"abstract":"Abstract<\/jats:title>In order to achieve an optimum performance of a given application on a given computer platform, a program developer or compiler must be aware of computer architecture parameters, including those related to branch predictors. Although dynamic branch predictors are designed with the aim of automatically adapting to changes in branch behavior during program execution, code optimizations based on the information about predictor structure can greatly increase overall program performance. Yet, exact predictor implementations are seldom made public, even though processor manuals provide valuable optimization tips.<\/jats:p>This paper presents an experimental flow with a series of microbenchmarks that determine the organization and size of a branch predictor using on\u2010chip performance monitoring registers. Such knowledge can be used either for manual code optimization or for design of new, more architecture\u2010aware compilers. Three examples illustrate how insight into exact branch predictor organization can be directly applied to code optimization. The proposed experimental flow is illustrated with microbenchmarks tuned for Intel Pentium III and Pentium 4 processors, although they can easily be adapted for other architectures. The described approach can also be used during processor design for performance evaluation of various branch predictor organizations and for testing and validation during implementation. Copyright \u00a9 2004 John Wiley & Sons, Ltd.<\/jats:p>","DOI":"10.1002\/spe.572","type":"journal-article","created":{"date-parts":[[2004,3,25]],"date-time":"2004-03-25T18:30:10Z","timestamp":1080239410000},"page":"465-487","source":"Crossref","is-referenced-by-count":7,"title":["Microbenchmarks for determining branch predictor organization"],"prefix":"10.1002","volume":"34","author":[{"given":"Milena","family":"Milenkovic","sequence":"first","affiliation":[]},{"given":"Aleksandar","family":"Milenkovic","sequence":"additional","affiliation":[]},{"given":"Jeffrey","family":"Kulick","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2004,1,23]]},"reference":[{"key":"e_1_2_1_2_2","unstructured":"Intel\u00aearchitecture optimization\u2014reference manual IA\u201032. Intel.http:\/\/www.intel.com\/design\/pentium4\/manuals\/248966.htm[July2003]."},{"key":"e_1_2_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2001.990684"},{"key":"e_1_2_1_4_2","unstructured":"Saavedra\u2010BarreraR.CPU performance evaluation and execution time prediction using narrow spectrum benchmarking.PhD Thesis Computer Science Division U.C. Berkeley 1992."},{"key":"e_1_2_1_5_2","volume-title":"Computer Architecture: A Quantitative Approach","author":"Hennessy J","year":"2003"},{"key":"e_1_2_1_6_2","unstructured":"HintonG SagerD UptonM BoggsD CarmeanD KykerA RousselP. The microarchitecture of the Pentium\u00ae4 processor.Intel Technology Journal.http:\/\/www.intel.com\/technology\/itj\/q12001.htm[July2003]."},{"key":"e_1_2_1_7_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003559"},{"key":"e_1_2_1_8_2","unstructured":"IntelVTune\u2122performance analyzer. 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Intel\u00aearchitecture software optimization reference manual.http:\/\/www.intel.com\/design\/PentiumIII\/manuals\/[December2001]."},{"key":"e_1_2_1_17_2","unstructured":"MilenkovicM MilenkovicA KulickJ.Demystifying Intel branch predictors.Proceedings of the Workshop on Duplicating Deconstructing and Debunking Anchorage AK 26 May2002;52\u201361."}],"container-title":["Software: Practice and Experience"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fspe.572","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/spe.572","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,11,16]],"date-time":"2023-11-16T16:40:09Z","timestamp":1700152809000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/spe.572"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,1,23]]},"references-count":16,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2004,4,25]]}},"alternative-id":["10.1002\/spe.572"],"URL":"http:\/\/dx.doi.org\/10.1002\/spe.572","archive":["Portico"],"relation":{},"ISSN":["0038-0644","1097-024X"],"issn-type":[{"value":"0038-0644","type":"print"},{"value":"1097-024X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2004,1,23]]}}}
