iBet uBet web content aggregator. Adding the entire web to your favor.
iBet uBet web content aggregator. Adding the entire web to your favor.



Link to original content: http://www.cs.berkeley.edu/~pattrsn/Arch/prototypes2.html
Berkeley Hardware Prototypes  
        Berkeley Hardware Prototypes 
 Computer Systems
Microprocessors
NOW-2 (1997) 105 Ultra-1 workstations (each with a 167 MHz UltraSPARC micro- processor, 128 MB of memory, and 2 Seagate Hawk 2 GB 5400 RPM 3.5 inch disks) connected Myrinet switched system area network with each link operating at 160 MBytes/second. [T0 die]T0 (1995) includes a MIPS-II 32-bit integer RISC core, a 1 KB instruction cache, a fixed-point vector coprocessor, and a 128-bit wide external memory interface. Fabricated in a 1.0 micron CMOS process, the die measures 280 mm2, contains 730,701 transistors, and runs at 45 MHz.
Tertiary Disk (1997) consists of a cluster of 20 PCs which host 396  8.4 GB, 7200 RPM, 3.5-inch IBM disks contained in seven 7-foot high, 19-inch wide racks. The PCs are P6-200MHz with 96 MB of DRAM each. They run FreeBSD 3.0 and the hosts are connected via switched 100Mbit/second Ethernet. VLSI-BAM (1990) is a RISC microprocessor  with support  for Prolog. Fabricated in 1.2 micron CMOS the die measures 169 mm2, contains 112,000  transistors, runs at 20 MHz and consumes 1 Watt at 5 Volts.
 
RAID-II (1993) consisted of three racks. The outer two racks contained 144 disks (3.5 inch IBM 320 MB SCSI) and their power supplies. The center rack contains three chassis: the top chassis holds VME disk controller boards (Interphase Cougar), the center chassis contains the custom crossbar switch (XBUS) and HIPPI interface boards; and the bottom chassis contains the Sun 4/280 workstation. This network attached storage devise was connected over 100 megabyte over second HIPPI network (UltraNet). SPUR chips (1988) This custom chip set enabled a multi- processor workstation. The processor is 170 mm2, contains 115,214 transistors, was fabbed in a 1.6 micron CMOS, and operates at 10 MHz. It contains a RISC processor designed to run Lisp well. The snooping cache controller is 130 mm2  in the same technology and contains 68,385 transistors. The floating point unit is 130  mm2 in the same technology and contained about 110,000 transistors.
RAID-I (1989) consisted of a Sun 4/280 workstation with 128 MB of DRAM, four dual-string SCSI controllers, 28 5.25-inch SCSI disks and specialized disk striping software. SOAR (1984) A 32-bit RISC chip designed to run Smalltalk. It contains 35,700 transistors, size is 89 mm2, was fabbed in 4 micron NMOS, dissipates 3W, and runs at 2.5 MHz.
 
As part of Project Genie (1964-65), Berkeley adds paged virtual memory to a SDS 930, which SDS then sells as the SDS 940 in April 1966. L. Peter Deutsch, Butler Lampson, and Chuck Thacker worked on this as students of Professor Bob Evans.		 RISC-II (1983) contains 40,760 transistors, was fabbed in 3 micron NMOS, ran at 3 MHz, and the size is 60 mm2.
California Digital Computer (CALDIC) (1951) This easy-to-understand, low-cost computer was developed by Berkeley students like Doug Englebart and Al Hoagland, and led by Professor Paul Morton. RISC-I (1982) Contains 44,420 transistors, fabbed in 5 micron NMOS, with a die area of 77 mm2, ran at 1 MHz. This chip is probably the first VLSI RISC. 

NOW-2 (1997) consists of a cluster of 105 Ultra-1 workstations (each with a 167 MHz UltraSPARC microprocessor, 128 MB of memory, and two Seagate Hawk 2 GB 5400 RPM 3.5 inch disks) running Solaris 2.6. They are connected by a Myrinet switched system area network with each link operating at  1 gigabit/second. The prototype consists of 10 7-foot high racks in two rows. It was constructed by Eric Anderson, Andrea Arpaci-Dusseau, Remzi Arpaci-Dusseau, Satoshi Asami, Brent Chun, Adam Costello, Mike Dahlin, Eric Fraser, Douglas Ghormley, Kim Keeton, Steve Lumetta, Alan Mainwaring, Cedric Krumbein, Lok Liu, Steve Luna, Ken Lutz, Rich Martin, Jeanna Neefe Matthews, Steve Rodrigues, Drew Roselli, Nisha Talagala, Amin Vahdat, Keith Vetter, Randy Wang, Frederick Wong, and Chad Yoshikawa, students and staff of Professors Tom Anderson, David Culler, and David Patterson. (NOW retreat group photo.)

Tertiary Disk (1997) consists of a cluster of 20 PCs which host 396  8.4 GB, 7200 RPM, 3.5-inch IBM disks contained in seven 7-foot high, 19-inch wide racks. The PCs are P6-200MHz with 96 MB of DRAM each. They run FreeBSD 3.0 and the hosts are connected via switched 100 Mbps Ethernet. All disks are connected to two PCs via double-ended SCSI chains. The primary application is called the Zoom Project, which was the world's largest art image database, with 72,000 images. (Second place in 1998 was 3500 images.) The prototype was constructed by Satoshi Asami and Nisha Talagala, both students of Professor David Patterson. (ZOOM group photo).

T0 (Torrent-0) (1995) is a single-chip fixed-point vector microprocessor designed for multimedia, human-interface, neural network, and other digital signal processing tasks. T0 includes a MIPS-II compatible 32-bit integer RISC core, a 1 KB instruction cache, a high performance fixed-point vector coprocessor, a 128-bit wide external memory interface, and a byte-serial host interface. Fabricated in a 1.0 micron CMOS process, the die measures 16.75 mm square and contains 730,701 transistors. At the maximum clock frequency of 45 MHz, T0 can simultaneously sustain 720 million arithmetic operations per second and 720 MByte/s of external memory bandwidth, with up to 30 MByte/s of DMA I/O. The first use of T0 is as the core of the SPERT-II workstation accelerator board. The core design team that "realized" T0 include Krste Asanovic, Brian Kingsbury and Bertrand Irissou, all students of Professor John Wawrzynek.

RAID-II (1993) consisted three racks. The outer two racks contained 144 disks (3.5 inch IBM 320 MB SCSI) and their power supplies. The center rack contains three chassis: the top chassis holds VME disk controller boards (Interphase Cougar), the center chassis contains the custom crossbar switch (XBUS) and HIPPI interface boards; and the bottom chassis contains the Sun 4/280 workstation. This network attached storage devise was connected over 100 megabyte over second HIPPI network (UltraNet). It was constructed by Pete Chen, Ann Chevernack,  Ed Lee, Ken Lutz,  Ehtan Miller,  Srinivasan Seshan,  and Ken Shirriff, students and staff of Professors Randy Katz and David Patterson.

VLSI-BAM (1990), or the VLSI Berkeley Abstract machine. This is a single-chip RISC processor with extensions to support the programming language Prolog.  Fabricated in 1.2 micron CMOS the die measures 169 mm2, contains 112,000  transistors, runs at 20 MHz and consumes 1 Watt at 5 Volts. This chip was designed by Mike Carlton, Bruce Holmer, Joan Pendleton, Peter Van Roy, and Barton Sano, students and staff of  Professor Alvin Despain.  The CAD system essential to making the chip  a reality was done by Charlie Burns and Dave Chenevert. The BAM processor was built using a technology independent, full custom CAD system.
RAID-I (1989) consisted of a Sun 4/280 workstation with 128 MB of DRAM, four dual-string SCSI controllers, 28 5.25-inch SCSI disks and specialized disk striping software. This project coined the term Redundant Arrays of Inexpensive Disks (RAID), still in use today. Our first RAID was constructed by Pete Chen, Ann Drapeau,  Ed Lee, Ken Lutz,  Ehtan Miller,  Srinivasan Seshan,  and Ken Shirriff, students and staff of Professors Randy Katz and David Patterson.
SPUR chips (1988) This custom chip set enabled a multiprocessor workstation that ran a custom operating system (Sprite). The processor is 13 by 13 mm, contains 115,214 transistors, was fabbed in a 1.6 micron CMOS, and operates at 10 MHz. It contains a RISC processor designed to run Lisp well. The snooping cache controller is 11.5 by 11.5 mm in the same technology and contained 68,385 transistors. (This group created the term "snoopy" or "snooping" to describe a multiprocessor cache that looks on shared bus to keep coherent.) The floating point unit followed the 64-bit IEEE 754 Floating Point Standard. Its size was also 11.5 by 11.5 mm in the same technology, it contains about 110,000 transistors and ran at 10 MHz or a peak rate of about 3 Megaflops. They were placed on a board inside a workstation from TI. These three chips were designed by B.K. Bose, Susan Eggers, Garth Gibson, Paul Hansen, D.K. Jeong, Shing Kong, Corinna Lee, David Lee, Mark Hill, and David Wood students and staff of Professors David Hodges, Randy Katz, and David Patterson.
SOAR (1984) A 32-bit RISC chip designed to run Smalltalk. It contains 35,700 transistors, size is 8.1 mm by 11.0 mm, was fabbed in 4 micron NMOS, dissipates 3W, and runs at 2.5 MHz. It was designed by  Joan Pendleton, David Ungar, Shing Kong, Will Brown, Frank Dunlap, and Chris Marino,  students of Professors David Hodges and David Patterson. (Picture of Patterson and Ousterhout.)

RISC-II (1983) contains 40,760 transistors, was fabbed in both 3 micron and 4 micron NMOS, and in 3 micron the size is 60 mm2, and it ran at 3 MHz. Designed by Bob Sherburne and Manolis Katevenis, students of Professors David Patterson and Carlo Sequin. (RISC group picture.)

RISC-I (1982) Contains 44,420 transistors, fabbed in 5 micron NMOS, with a die area of 77 mm2, ran at 1 MHz. This project coined the term Reduced Instruction Set Computer (RISC). This chip is probably the first VLSI RISC. Designed by Dan Fitzpatrick, John Foderaro, Jim Peek,  Zvi Peshkess, and Korbin Van Dyke, students of Professors David Patterson and Carlo Sequin. The RISC CAD group included Dan Fitzpatrick, Professor John Ousterhout, and Howard Landman.

SDS 940 (1964) Scientific Data Systems (SDS)  940 was designed and implemented at Berkeley as part of Project Genie. It was subsequently marketed by SDS as the first commercial time-sharing which allowed user programming in machine language. About 60 machines were sold, and they were the initial hardware base for many time-sharing service companies, including Tymshare. This system was copied directly in the design of the Tenex system for the PDP-10, except for the memory management. Tenex later evolved into TOPS-20, the standard operating system for the DecSystem 20. Some of the 940 system's ideas are also embodied in Unix, whose designer Ken Thompson worked on the 940 while at Berkeley. Students who worked on this include Larry Barnes, L. Peter Deutsch, Wayne Lichtenberger, Butler Lampson,  Mel Pirtle,  and Chuck Thacker, and were led by Professor Robert Evans. They modified an SDS 930 which SDS to add the  user/OS protection modes and mapped the 16 K-word address space into 8 2K-word pages. They also wrote a timeshared operating system for it. (SDS later sold it as the 940. SDS was later purchased by Xerox, and became XDS.) The Genie project eventually led to the Berkeley Computer Corporation (BCC). When BCC faltered, the employees were recruited by Bob Taylor--who had been the ARPA program manager of Project Genie--to form the core of Xerox PARC.

California Digital Computer (CALDIC) (1951) Designed for for the benefit of Berkeley's research, it was a low-cost machine designed for simplicity of description and operation. This serial machine used a magnetic drum memory, 1300 vacuum tubes, was a decimal computer with 10 digit words, and it operated at about 50 IPS. The magnetic drum memory was its outstanding feature, 8 inches in diameter and storing 10,000 10-digit words (about 400,000 bits). "Practically all of the design and constructions of the CALDIC is work of graduate and undergraduate students in Electrical Engineering, some 35 having been associated with the project already." This group included Doug Englebart and Al Hoagland, pioneers of the computer and disk industries. (Scanned photos and diagrams of CALDIC.)

References