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Link to original content: http://wikipedia.org/wiki/Chip_package
List of electronic component packaging types - Wikipedia Jump to content

List of electronic component packaging types

From Wikipedia, the free encyclopedia
(Redirected from Chip package)

A standard-sized 8-pin dual in-line package (DIP) containing a 555 IC.

Integrated circuits and certain other electronic components are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of package types exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.

Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.

Through-hole packages

[edit]
Main article: dual in-line package

Through-hole technology uses holes drilled through the printed circuit board (PCB) for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.

Three 14-pin (DIP14) plastic dual in-line packages containing IC chips.
Acronym Full name Remark
SIP Single in-line package
DIP Dual in-line package 0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) or 0.6 in (15.24 mm) apart. Other row spacings are used much less frequently, like 0.4 in (10.2 mm) and 0.9 in (22.9 mm).
CDIP Ceramic DIP[1]
CERDIP Glass-sealed ceramic DIP[1]
QIP Quad in-line package Like DIP but with staggered (zig-zag) pins.[1]
SKDIP Skinny DIP Standard DIP with 0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) apart.[1]
SDIP Shrink DIP Non-standard DIP with smaller 0.07 in (1.78 mm) pin spacing.[1]
ZIP Zig-zag in-line package
MDIP Molded DIP[2]
PDIP Plastic DIP[1]

Surface mount

[edit]
See also: Surface-mount technology
Acronym Full name Remark
CCGA Ceramic column-grid array (CGA)[3]
CGA Column-grid array[3]
CERPACK Ceramic package[4]
CQGP[5] Ceramic Quad Grid Array Package
LLP Lead-less lead-frame package A package with metric pin distribution (0.5–0.8 mm pitch)[6]
LGA Land grid array[3]
LTCC Low-temperature co-fired ceramic[7]
MCM Multi-chip module[8]
MICRO SMDXT Micro surface-mount device extended technology[9]

Chip on board is a packaging technique that directly connects a die to a PCB, without an interposer or lead frame.

Chip carrier

[edit]
Main article: chip carrier

A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.

Acronym Full name Remark
BCC Bump chip carrier[3]
CLCC Ceramic lead-less chip carrier[1]
LCC Lead-less chip carrier[3] Contacts are recessed vertically.
LCC Leaded chip carrier[3]
LCCC Leaded ceramic-chip carrier[3]
DLCC Dual lead-less chip carrier (ceramic)[3]
PLCC Plastic leaded chip carrier[1][3]

Pin grid arrays

[edit]
Main article: Pin grid array
Acronym Full name Remark
OPGA Organic pin-grid array
FCPGA Flip-chip pin-grid array[3]
PGA Pin-grid array Also known as PPGA[1]
CPGA Ceramic pin-grid array[3]

Flat packages

[edit]
Main article: Quad flat package
Acronym Full name Remark
- Flat-pack Earliest version metal/ceramic packaging with flat leads
CFP Ceramic flat-pack[3]
CQFP Ceramic quad flat-pack[1][3] Similar to PQFP
BQFP Bumpered quad flat-pack[3]
DFN Dual flat-pack No lead[3]
ETQFP Exposed thin quad flat-package[10]
PQFN Power quad flat-pack No-leads, with exposed die-pad[s] for heatsinking[11]
PQFP Plastic quad flat-package[1][3]
LQFP Low-profile quad flat-package[3]
QFN Quad flat no-leads package Also called as micro lead frame (MLF).[3][12]
QFP Quad flat package[1][3]
MQFP Metric quad flat-pack QFP with metric pin distribution[3]
HVQFN Heat-sink very-thin quad flat-pack, no-leads
SIDEBRAZE[13][14] [clarification needed] [clarification needed]
TQFP Thin quad flat-pack[1][3]
VQFP Very-thin quad flat-pack[3]
TQFN Thin quad flat, no-lead
VQFN Very-thin quad flat, no-lead
WQFN Very-very-thin quad flat, no-lead
UQFN Ultra-thin quad flat-pack, no-lead
ODFN Optical dual flat, no-lead IC packaged in transparent packaging used in optical sensor

Small outline packages

[edit]

A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.

Acronym Full name Remark
SOP Small-outline package[1]
CSOP Ceramic small-outline package
DSOP Dual small-outline package
HSOP Thermally-enhanced small-outline package
HSSOP Thermally-enhanced shrink small-outline package[15]
HTSSOP Thermally-enhanced thin shrink small-outline package[15]
mini-SOIC Mini small-outline integrated circuit
MSOP Mini small-outline package Maxim uses the trademarked name μMAX for MSOP packages
PSOP Plastic small-outline package[3]
PSON Plastic small-outline no-lead package
QSOP Quarter-size small-outline package The terminal pitch is 0.635 mm.[3]
SOIC Small-outline integrated circuit Also known as SOIC NARROW and SOIC WIDE
SOJ Small-outline J-leaded package
SON Small-outline no-lead package
SSOP Shrink small-outline package[3]
TSOP Thin small-outline package[3]
TSSOP Thin shrink small-outline package[3]
TVSOP Thin very-small-outline package[3]
VSOP Very-small-outline package[15]
VSSOP Very-thin shrink small-outline package[15] Also referred as MSOP = micro small-outline package
WSON Very-very-thin small-outline no-lead package
USON Very-very-thin small-outline no-lead package Slightly smaller than WSON

Chip-scale packages

[edit]

According to IPC's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm. Chip-scale package

Example WL-CSP devices sitting on the face of a U.S. penny. A SOT-23 device is shown (top) for comparison.
Acronym Full name Remark
BL Beam lead technology Bare silicon chip, an early chip-scale package
CSP Chip-scale package Package size is no more than 1.2× the size of the silicon chip[16][17]
TCSP True chip-size package Package is same size as silicon[18]
TDSP True die-size package Same as TCSP[18]
WCSP or WL-CSP or WLCSP Wafer-level chip-scale package A WL-CSP or WLCSP package is just a bare die with a redistribution layer (or I/O pitch) to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a BGA package.[19]
PMCP Power mount CSP (chip-scale package) Variation of WLCSP, for power devices like MOSFETs. Made by Panasonic.[20]
Fan-out WLCSP Fan-out wafer-level packaging Variation of WLCSP. Like a BGA package but with the interposer built directly atop the die and encapsulated alongside it.
eWLB Embedded wafer level ball grid array Variation of WLCSP.
MICRO SMD - Chip-size package (CSP) developed by National Semiconductor[21]
COB Chip on board Bare die supplied without a package. It is mounted directly to the PCB using bonding wires and covered with a blob of black Epoxy.[22] Also used for LEDs. In LEDs, transparent epoxy or a silicon caulk-like material that may contain a phosphor is poured into a mold containing the LED(s) and cured. The mold forms part of the package.
COF Chip-on-flex Variation of COB, where a chip is mounted directly to a flex circuit. Unlike COB, it may not use wires nor be covered with epoxy, using underfill instead.
TAB Tape-automated bonding Variation of COF, where a flip chip is mounted directly to a flex circuit without the use of bonding wires. Used by LCD driver ICs.
COG Chip-on-glass Variation of TAB, where a chip is mounted directly to a piece of glass - typically an LCD. Used by LCD and OLED driver ICs.

Ball grid array

[edit]
Main article: Ball grid array

Ball grid array (BGA) uses the underside of the package to place pads with balls of solder in grid pattern as connections to PCB.[1][3]

Acronym Full name Remark
FBGA Fine-pitch ball-grid array A square or rectangular array of solder balls on one surface[3]
LBGA Low-profile ball-grid array Also known as laminate ball-grid array[3]
TEPBGA Thermally-enhanced plastic ball-grid array
CBGA Ceramic ball-grid array[3]
OBGA Organic ball-grid array[3]
TFBGA Thin fine-pitch ball-grid array[3]
PBGA Plastic ball-grid array[3]
MAP-BGA Mold array process - ball-grid array [1]
UCSP Micro (μ) chip-scale package Similar to a BGA (A Maxim trademark example)[17]
μBGA Micro ball-grid array Ball spacing less than 1 mm
LFBGA Low-profile fine-pitch ball-grid array[3]
TBGA Thin ball-grid array[3]
SBGA Super ball-grid array[3] Above 500 balls
UFBGA Ultra-fine ball-grid array[3]

Transistor, diode, small-pin-count IC packages

[edit]
A drawing of a ZN414 IC in a TO-18 package
  • MELF: Metal electrode leadless face (usually for resistors and diodes)
  • SOD: Small-outline diode.
  • SOT: Small-outline transistor (also SOT-23, SOT-223, SOT-323).
  • TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes.
    • TO-3: Panel-mount with leads
    • TO-5: Metal can package with radial leads
    • TO-18: Metal can package with radial leads
    • TO-39
    • TO-46
    • TO-66: Similar shape to the TO-3 but smaller
    • TO-92: Plastic-encapsulated package with three leads
    • TO-99: Metal can package with eight radial leads
    • TO-100: Metal can package with ten radial leads, similar to TO-99
    • TO-126: Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
    • TO-220: Through-hole plastic package with a (usually) metal heat sink tab and three leads
    • TO-226[23]
    • TO-247:[24] Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
    • TO-251:[24] Also called IPAK: SMT package similar to the DPAK but with longer leads for SMT or TH mounting
    • TO-252:[24] (also called SOT428, DPAK):[24] SMT package similar to the DPAK but smaller
    • TO-262:[24] Also called I2PAK: SMT package similar to the D2PAK but with longer leads for SMT or TH mounting
    • TO-263:[24] Also called D2PAK: SMT package similar to the TO-220 without the extended tab and mounting hole
    • TO-274:[24] Also called Super-247: SMT package similar to the TO-247 without the mounting hole

Dimension reference

[edit]

Surface-mount

[edit]
A general surface mount chip, with major dimensions.
A general surface mount chip, with major dimensions.
C
Clearance between IC body and PCB
H
Total height
T
Lead thickness
L
Total carrier length
LW
Lead width
LL
Lead length
P
Pitch

Through-hole

[edit]
A general through-hole pin chip, with major dimensions.
A general through-hole pin chip, with major dimensions.
C
Clearance between IC body and board
H
Total height
T
Lead thickness
L
Total carrier length
LW
Lead width
LL
Lead length
P
Pitch
WB
IC body width
WL
Lead-to-lead width

Package dimensions

[edit]

All measurements below are given in mm. To convert mm to mils, divide mm by 0.0254 (i.e., 2.54 mm / 0.0254 = 100 mil).

C
Clearance between package body and PCB.
H
Height of package from pin tip to top of package.
T
Thickness of pin.
L
Length of package body only.
LW
Pin width.
LL
Pin length from package to pin tip.
P
Pin pitch (distance between conductors to the PCB).
WB
Width of the package body only.
WL
Length from pin tip to pin tip on the opposite side.

Dual row

[edit]
Image Family Pin Name Package L WB WL H C P LL T LW
DIP Y Dual inline package 8-DIP 9.2–9.8 6.2–6.48 7.62 7.7 2.54 (0.1 in) 3.05–3.6 1.14–1.73
32-DIP 15.24 2.54 (0.1 in)
LFCSP N Lead-frame chip-scale package 0.5
MSOP Y Mini small-outline package 8-MSOP 3 3 4.9 1.1 0.10 0.65 0.95 0.18 0.17–0.27
10-MSOP 3 3 4.9 1.1 0.10 0.5 0.95 0.18 0.17–0.27
16-MSOP 4.04 3 4.9 1.1 0.10 0.5 0.95 0.18 0.17–0.27
SO
SOIC
SOP 		Y Small-outline integrated circuit 8-SOIC 4.8–5.0 3.9 5.8–6.2 1.72 0.10–0.25 1.27 1.05 0.19–0.25 0.39–0.46
14-SOIC 8.55–8.75 3.9 5.8–6.2 1.72 0.10–0.25 1.27 1.05 0.19–0.25 0.39–0.46
16-SOIC 9.9–10 3.9 5.8–6.2 1.72 0.10–0.25 1.27 1.05 0.19–0.25 0.39–0.46
16-SOIC 10.1–10.5 7.5 10.00–10.65 2.65 0.10–0.30 1.27 1.4 0.23–0.32 0.38–0.40
SOT Y Small-outline transistor SOT-23-6 2.9 1.6 2.8 1.45 0.95 0.6 0.22–0.38
SSOP Y Shrink small-outline package 0.65
TDFN N Thin dual flat no-lead 8-TDFN 3 3 3 0.7–0.8 0.65 — 0.19–0.3
TSOP Y Thin small-outline package 0.5
TSSOP Package
TSSOP Package
 TSSOP Y Thin shrink small-outline package 8-TSSOP[25] 2.9-3.1 4.3-4.5 6.4 1.2 0.15 0.65 0.09–0.2 0.19–0.3
Y 14-TSSOP[26] 4.9-5.1 4.3-4.5 6.4 1.1 0.05-0.15 0.65 0.09-0.2 0.19-0.30
20-TSSOP[27] 6.4-6.6 4.3-4.5 6.4 1.1 .05-0.15 0.65 0.09-0.2 0.19-0.30
μSOP Y Micro small-outline package[28] μSOP-8 3 4.9 1.1 0.65
US8[29] Y US8 package 2 2.3 3.1 .7 0.5

Quad rows

[edit]
Image Family Pin Name Package WB WL H C L P LL T LW
PLCC N Plastic leaded chip-carrier 1.27
CLCC N Ceramic leadless chip-carrier 48-CLCC 14.22 14.22 2.21 14.22 1.016 — 0.508
LQFP Y Low-profile quad flat package 0.50
TQFP Y Thin quad flat-package TQFP-44 10.00 12.00 0.35–0.50 0.80 1.00 0.09–0.20 0.30–0.45
TQFN N Thin quad flat no-lead

LGA

[edit]
Package x y z
52-ULGA 12 mm 17 mm 0.65 mm
52-ULGA 14 mm 18 mm 0.10 mm
52-VELGA ? ? ?

Multi-chip packages

[edit]

A variety of techniques for interconnecting several chips within a single package have been proposed and researched:

By terminal count

[edit]
Example of component sizes, metric and imperial codes and comparison included
Composite image of a 11×44 LED matrix lapel name tag display using 1608/0603-type SMD LEDs. Top: A little over half of the 21×86 mm display. Center: Close-up of LEDs in ambient light. Bottom: LEDs in their own red light.
SMD capacitors (on the left) with two through-hole capacitors (on the right)
Main article: Chip carrier

Surface-mount components are usually smaller than their counterparts with leads, and are designed to be handled by machines rather than by humans. The electronics industry has standardized package shapes and sizes (the leading standardisation body is JEDEC).

The codes given in the chart below usually tell the length and width of the components in tenths of millimeters or hundredths of inches. For example, a metric 2520 component is 2.5 mm by 2.0 mm which corresponds roughly to 0.10 inches by 0.08 inches (hence, imperial size is 1008). Exceptions occur for imperial in the two smallest rectangular passive sizes. The metric codes still represent the dimensions in mm, even though the imperial size codes are no longer aligned. Problematically, some manufacturers are developing metric 0201 components with dimensions of 0.25 mm × 0.125 mm (0.0098 in × 0.0049 in),[31] but the imperial 01005 name is already being used for the 0.4 mm × 0.2 mm (0.0157 in × 0.0079 in) package. These increasingly small sizes, especially 0201 and 01005, can sometimes be a challenge from a manufacturability or reliability perspective.[32]

Two-terminal packages

[edit]

Rectangular passive components

[edit]

Mostly resistors and capacitors.

Package Approximate dimensions, length × width Typical resistor
power rating (W)
Metric Imperial
0201 008004 0.25 mm × 0.125 mm 0.010 in × 0.005 in
03015 009005 0.3 mm × 0.15 mm 0.012 in × 0.006 in 0.02[33]
0402 01005 0.4 mm × 0.2 mm 0.016 in × 0.008 in 0.031[34]
0603 0201 0.6 mm × 0.3 mm 0.02 in × 0.01 in 0.05[34]
1005 0402 1.0 mm × 0.5 mm 0.04 in × 0.02 in 0.062[35]–0.1[34]
1608 0603 1.6 mm × 0.8 mm 0.06 in × 0.03 in 0.1[34]
2012 0805 2.0 mm × 1.25 mm 0.08 in × 0.05 in 0.125[34]
2520 1008 2.5 mm × 2.0 mm 0.10 in × 0.08 in
3216 1206 3.2 mm × 1.6 mm 0.125 in × 0.06 in 0.25[34]
3225 1210 3.2 mm × 2.5 mm 0.125 in × 0.10 in 0.5[34]
4516 1806 4.5 mm × 1.6 mm 0.18 in × 0.06 in[36]
4532 1812 4.5 mm × 3.2 mm 0.18 in × 0.125 in 0.75[34]
4564 1825 4.5 mm × 6.4 mm 0.18 in × 0.25 in 0.75[34]
5025 2010 5.0 mm × 2.5 mm 0.20 in × 0.10 in 0.75[34]
6332 2512 6.3 mm × 3.2 mm 0.25 in × 0.125 in 1[34]
6863 2725 6.9 mm × 6.3 mm 0.27 in × 0.25 in 3
7451 2920 7.4 mm × 5.1 mm 0.29 in × 0.20 in[37]

Tantalum capacitors

[edit]
Main article: Tantalum capacitor
Package Dimensions (Length, typ. × width, typ. × height, max.)
EIA 2012-12 (KEMET R, AVX R) 2.0 mm × 1.3 mm × 1.2 mm
EIA 3216-10 (KEMET I, AVX K) 3.2 mm × 1.6 mm × 1.0 mm
EIA 3216-12 (KEMET S, AVX S) 3.2 mm × 1.6 mm × 1.2 mm
EIA 3216-18 (KEMET A, AVX A) 3.2 mm × 1.6 mm × 1.8 mm
EIA 3528-12 (KEMET T, AVX T) 3.5 mm × 2.8 mm × 1.2 mm
EIA 3528-21 (KEMET B, AVX B) 3.5 mm × 2.8 mm × 2.1 mm
EIA 6032-15 (KEMET U, AVX W) 6.0 mm × 3.2 mm × 1.5 mm
EIA 6032-28 (KEMET C, AVX C) 6.0 mm × 3.2 mm × 2.8 mm
EIA 7260-38 (KEMET E, AVX V) 7.2 mm × 6.0 mm × 3.8 mm
EIA 7343-20 (KEMET V, AVX Y) 7.3 mm × 4.3 mm × 2.0 mm
EIA 7343-31 (KEMET D, AVX D) 7.3 mm × 4.3 mm × 3.1 mm
EIA 7343-43 (KEMET X, AVX E) 7.3 mm × 4.3 mm × 4.3 mm

[38][39]

Aluminum capacitors

[edit]
Main article: Electrolytic capacitor
Package Dimensions (Length, typ. × width, typ. × height, max.)
Cornell-Dubilier A 3.3 mm × 3.3 mm × 5.5 mm
Chemi-Con D 4.3 mm × 4.3 mm × 5.7 mm
Panasonic B 4.3 mm × 4.3 mm × 6.1 mm
Chemi-Con E 5.3 mm × 5.3 mm × 5.7 mm
Panasonic C 5.3 mm × 5.3 mm × 6.1 mm
Chemi-Con F 6.6 mm × 6.6 mm × 5.7 mm
Panasonic D 6.6 mm × 6.6 mm × 6.1 mm
Panasonic E/F, Chemi-Con H 8.3 mm × 8.3 mm × 6.5 mm
Panasonic G, Chemi-Con J 10.3 mm × 10.3 mm × 10.5 mm
Chemi-Con K 13 mm × 13 mm × 14 mm
Panasonic H 13.5 mm × 13.5 mm × 14 mm
Panasonic J, Chemi-Con L 17 mm × 17 mm × 17 mm
Panasonic K, Chemi-Con M 19 mm × 19 mm × 17 mm

[40][41][42]

Small-outline diode (SOD)

[edit]
Package Dimensions (Length, typ. × width, typ. × height, max.)
SOD-80C 3.5 mm × ⌀ 1.5 mm[43]
SOD-123 2.65 mm × 1.6 mm × 1.35 mm[44]
SOD-128 3.8 mm × 2.5 mm × 1.1 mm[45]
SOD-323 (SC-76) 1.7 mm × 1.25 mm × 1.1 mm[46]
SOD-523 (SC-79) 1.2 mm × 0.8 mm × 0.65 mm[47]
SOD-723 1.0 mm × 0.6 mm × 0.65 mm[48]
SOD-923 0.8 mm × 0.6 mm × 0.4 mm[49]

Metal electrode leadless face (MELF)

[edit]
Main article: Metal electrode leadless face

Mostly resistors and diodes; barrel shaped components, dimensions do not match those of rectangular references for identical codes.[50]

Package Dimensions
Typical resistor rating
Power (W) Voltage (V)
MicroMELF (MMU), 0102 2.2 mm × ⌀ 1.1 mm 0.2–0.3 150
MiniMELF (MMA), 0204 3.6 mm × ⌀ 1.4 mm 0.25–0.4 200
MELF (MMB), 0207 5.8 mm × ⌀ 2.2 mm 0.4–1.0 300

DO-214

[edit]
Main article: DO-214

Commonly used for rectifier, Schottky, and other diodes.

Package Dimensions (incl. leads) (Length, typ. × width, typ. × height, max.)
DO-214AA (SMB) 5.4 mm × 3.6 mm × 2.65 mm[51]
DO-214AB (SMC) 7.95 mm × 5.9 mm × 2.25 mm[51]
DO-214AC (SMA) 5.2 mm × 2.6 mm × 2.15 mm[51]

Three- and four-terminal packages

[edit]

Small-outline transistor (SOT)

[edit]
Main article: Small-outline transistor
Package Aliases Dimensions (excl. leads) (Length, typ. × width, typ. × height, max.) Number of terminals Remark
SOT-23-3 TO-236-3, SC-59 2.92 mm × 1.3 mm × 1.12 mm[52] 3
SOT-89 TO-243,[53] SC-62[54] 4.5 mm × 2.5 mm × 1.5 mm[55] 4 Center pin is connected to a large heat-transfer pad
SOT-143 TO-253 2.9 mm × 1.3 mm × 1.22 mm[56] 4 Tapered body, one larger pad denotes terminal 1
SOT-223 TO-261 6.5 mm × 3.5 mm × 1.8 mm[57] 4 One terminal is a large heat-transfer pad
SOT-323 SC-70 2 mm × 1.25 mm × 1.1 mm[58] 3
SOT-416 SC-75 1.6 mm × 0.8 mm × 0.9 mm[59] 3
SOT-663 1.6 mm × 1.2 mm × 0.6 mm[60] 3
SOT-723 1.2 mm × 0.8 mm × 0.55[61] 3 Has flat leads
SOT-883 SC-101 1 mm × 0.6 mm × 0.5 mm[62] 3 Is lead-less

Other

[edit]
  • DPAK (TO-252, SOT-428): Discrete Packaging. Developed by Motorola to house higher powered devices. Comes in three[63] or five-terminal[64] versions.
  • D2PAK (TO-263, SOT-404): Bigger than the DPAK; basically a surface mount equivalent of the TO220 through-hole package. Comes in 3, 5, 6, 7, 8 or 9-terminal versions.[65]
  • D3PAK (TO-268): Even larger than D2PAK.[66][67]

Five- and six-terminal packages

[edit]

Small-outline transistor (SOT)

[edit]
Package Aliases Dimensions (excl. leads) (Length, typ. × width, typ. × height, max.) Number of terminals Leaded or leadless
SOT-23-6 SOT-26, SC-74 2.9 mm × 1.3 mm × 1.3 mm[68] 6 Leaded
SOT-353 SC-88A 2 mm × 1.25 mm × 0.95 mm[69] 5 Leaded
SOT-363 SC-88, SC-70-6 2 mm × 1.25 mm × 0.95 mm[70] 6 Leaded
SOT-563 1.6 mm × 1.2 mm × 0.6 mm[71] 6 Leaded
SOT-665 1.6 mm × 1.6 mm × 0.55 mm[72] 5 Leaded
SOT-666 1.6 mm × 1.2 mm × 0.6 mm[73] 6 Leaded
SOT-886 1.45 mm × 1 mm × 0.5 mm[74] 6 Leadless
SOT-891 1 mm × 1 mm × 0.5 mm[75] 6 Leadless
SOT-953 1 mm × 0.8 mm × 0.5 mm[76] 5 Leaded
SOT-963 1 mm × 1 mm × 0.5 mm[77] 6 Leaded
SOT-1115 1 mm × 0.9 mm × 0.35 mm[78] 6 Leadless
SOT-1202 1 mm × 1 mm × 0.35 mm[79] 6 Leadless
Various SMD chips, desoldered
MLP package 28-pin chip, upside down to show contacts

Packages with more than six terminals

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Dual-in-line

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Main article: Dual in-line package

Quad-in-line

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Main article: Quad in-line package
  • Plastic leaded chip carrier (PLCC): square, J-lead, pin spacing 1.27 mm
  • Quad flat package (QFP): various sizes, with pins on all four sides
  • Low-profile quad flat-package (LQFP): 1.4 mm high, varying sized and pins on all four sides
  • Plastic quad flat-pack (PQFP), a square with pins on all four sides, 44 or more pins
  • Ceramic quad flat-pack (CQFP): similar to PQFP
  • Metric quad flat-pack (MQFP): a QFP package with metric pin distribution
  • Thin quad flat-pack (TQFP), a thinner version of LQFP
  • Quad flat no-lead (QFN): smaller footprint than leaded equivalent
  • Leadless chip carrier (LCC): contacts are recessed vertically to "wick-in" solder. Common in aviation electronics because of robustness to mechanical vibration.
  • Micro leadframe package (MLP, MLF): with a 0.5 mm contact pitch, no leads (same as QFN)
  • Power quad flat no-lead (PQFN): with exposed die-pads for heatsinking

Grid arrays

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  • Ball grid array (BGA): A square or rectangular array of solder balls on one surface, ball spacing typically 1.27 mm (0.050 in)
    • Fine-pitch ball grid array (FBGA): A square or rectangular array of solder balls on one surface
    • Low-profile fine-pitch ball grid array (LFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.8 mm
    • Micro ball grid array (μBGA): Ball spacing less than 1 mm
    • Thin fine-pitch ball grid array (TFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.5 mm
  • Land grid array (LGA): An array of bare lands only. Similar to in appearance to QFN, but mating is by spring pins within a socket rather than solder.
  • Column grid array (CGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern.
    • Ceramic column grid array (CCGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. The body of the component is ceramic.
  • Lead-less package (LLP): A package with metric pin distribution (0.5 mm pitch).

Non-packaged devices

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Although surface-mount, these devices require specific process for assembly.

  • Chip-on-board (COB), a bare silicon chip, that is usually an integrated circuit, is supplied without a package (which is usually a lead frame overmolded with epoxy) and is attached, often with epoxy, directly to a circuit board. The chip is then wire bonded and protected from mechanical damage and contamination by an epoxy "glob-top".
  • Chip-on-flex (COF), a variation of COB, where a chip is mounted directly to a flex circuit. Tape-automated bonding process is also a chip-on-flex process as well.
  • Chip-on-glass (COG), a variation of COB, where a chip, typically a liquid crystal display (LCD) controller, is mounted directly on glass.
  • Chip-on-wire (COW), a variation of COB, where a chip, typically a LED or RFID chip, is mounted directly on wire, thus making it a very thin and flexible wire. Such wire may then be covered with cotton, glass or other materials to make into smart textiles or electronic textiles.

There are often subtle variations in package details from manufacturer to manufacturer, and even though standard designations are used, designers need to confirm dimensions when laying out printed circuit boards.

See also

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References

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