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system-on-chip · GitHub Topics · GitHub

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system-on-chip

Here are 82 public repositories matching this topic...

enjoy-digital / litex

Build your hardware, easily!

fpga hardware system-on-chip

Updated Dec 11, 2024
C

neorv32

stnolting / neorv32

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Updated Dec 10, 2024
VHDL

The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

Updated Oct 20, 2024
Python

sld-columbia / esp

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

asic fpga embedded-systems riscv system-on-chip network-on-chip accelerators

Updated Dec 10, 2024
C

stnolting / neo430

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

open-source microcontroller fpga processor vhdl gcc customizable msp430 soc soft-core system-on-chip msp430-gcc

Updated Nov 23, 2021
VHDL

kactus2 / kactus2dev

Kactus2 is a graphical EDA tool based on the IP-XACT standard.

design fpga hardware eda ip-xact reuse hdl mpsoc system-on-chip

Updated Dec 5, 2024
C++

riscv-steel / riscv-steel

RISC-V 32-bit microcontroller developed in Verilog

microcontroller cpu gpio core processor riscv spi uart mcu steel risc-v rv32i system-on-chip zicsr

Updated Oct 21, 2024
Verilog

Awesome-Retro-Docs

TinyRetroWarehouse / Awesome-Retro-Docs

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

Updated Mar 5, 2021

arm-university / Introduction-to-SoC-Design-Education-Kit

Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals

arm fpga cortex-m cmsis hardware-designs soc arm-cortex-m0 system-on-chip amba keil-mdk system-on-chip-design design-start

Updated Jul 26, 2024
HTML

azonenberg / antikernel

The Antikernel operating system project

fpga operating-system research-project security-hardening fpga-soc system-on-chip

Updated Apr 23, 2020
Verilog

ultraembedded / riscv_soc

Basic RISC-V Test SoC

linux verilog fpga-soc-linux systemc fpga-soc risc-v system-on-chip riscv-linux

Updated Apr 7, 2019
Verilog

amaranth-lang / amaranth-soc

System on Chip toolkit for Amaranth HDL

fpga system-on-chip amaranth-hdl

Updated Oct 12, 2024
Python

ILAng

PrincetonUniversity / ILAng

A Modeling and Verification Platform for SoCs using ILAs

accelerator verification abstraction ila heterogeneous system-on-chip formal ilang

Updated Jul 3, 2024
C++

sparkfun / ESP32_Thing

Development platform for the Espressif ESP32 WiFi/Microcontroller SoC

iot hardware esp32 wifi iot-platform system-on-chip sparkfun-products

Updated Mar 18, 2023

meiniKi / FazyRV

A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.

fpga embedded-systems computer-architecture risc-v digital-design system-on-chip vlsi-design

Updated Sep 4, 2024
SystemVerilog

sy2002 / QNICE-FPGA

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

c tutorial cpu fpga vhdl assembler open-hardware fpga-game sd-card vga 16-bit soft-core system-on-chip vhdl-examples qnice learn-fpga fpga-tutorial vhdl-tutorial

Updated Oct 15, 2024
Assembly

maikmerten / spu32

Small Processing Unit 32: A compact RV32I CPU written in Verilog

fpga verilog icestorm risc-v ice40 rv32i system-on-chip risc-processor

Updated May 30, 2022
C

ZipCPU / zbasic

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

fpga verilog system-on-chip verilator zipcpu

Updated Oct 27, 2022
Verilog

manili / VSDBabySoC

VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.

risc-v mixed-signal system-on-chip digital-to-analog-converter phase-locked-loop rvmyth

Updated Jan 4, 2022
Verilog

riscv-atom

saursin / riscv-atom

An open-source 32-bit RISC-V soft-core processor

microcontroller embedded cpu fpga core processor riscv verilog mcu soc risc-v soft-core rv32i system-on-chip riscv32 riscv-processor

Updated Jun 21, 2024
C++

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